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3.0 GHz Low Noise Silicon MMIC Amplifier Technical Data
INA-54063
Features
* Ultra-Miniature Package * Single 5 V Supply (29 mA) * 21.5 dB Gain (1.9 GHz) * 8.0 dBm P1dB (1.9 GHz) * Positive Gain Slope * Unconditionally Stable
Surface Mount Package SOT-363 (SC-70)
Description
Hewlett-Packard's INA-54063 is a Silicon monolithic amplifier that offers excellent gain and power output for applications to 3.0 GHz. Packaged in an ultraminiature SOT-363 package, it requires half the board space of a SOT-143 package. With its wide bandwidth and high linearity, the INA-54063 is an excellent candidate for DBS IF applications. It also features a unique gain curve which increases over the range from 1 to 2 GHz. This gain slope compensates for the gain rolloff found in typical receiver systems. The INA-54063 is fabricated using HP's 30 GHz fMAX ISOSATTM Silicon bipolar process which uses nitride self-alignment submicrometer lithography, trench isolation, ion implantation, gold metalization, and polyimide intermetal dielectric and scratch protection to achieve superior performance, uniformity, and reliability.
Applications
* IF Amplifier for DBS Downconverter, Cellular, Cordless, Special Mobile Radio, PCS, ISM, and Wireless LAN Applications
Pin Connections and Package Marking
GND 1 OUTPUT 6 and V d 5 GND 4 VCC
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GND 2 INPUT 3
Equivalent Circuit
(Simplified)
Note: Package marking provides orientation and identification.
Vd
RF INPUT
RF OUTPUT and Vd
GROUND
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5965-5364E
INA-54063 Absolute Maximum Ratings
Symbol Vd Pin Tj TSTG Parameter Supply Voltage, to Ground CW RF Input Power Junction Temperature Storage Temperature Units V dBm C C Absolute Maximum[1] 12 13 150 -65 to 150 Thermal Resistance[2]: j-c = 165C/W
Notes: 1. Operation of this device above any one of these limits may cause permanent damage. 2. TC = 25C (TC is defined to be the temperature at the package pins where contact is made to the circuit board).
Electrical Specifications, TC = 25C, ZO = 50 , Vd = 5 V, unless noted
Symbol GP NF P1dB IP3 VSWR in VSWR out Id td Parameters and Test Conditions Power Gain (|S 21| 2 ) Noise Figure Output Power at 1 dB Gain Compression Third Order Intercept Point Input VSWR Output VSWR Device Current Group Delay f = 1900 MHz f = 1900 MHz f = 1900 MHz f = 1900 MHz f = 1900 MHz f = 2150 MHz f = 1900 MHz f = 1900 MHz mA ps Units dB dB dBm dBm Min. 19 Typ. 21.5 5.0 8.0 17 15.7 1.4 2.4 29 272 36 1.8 Max. Std. Dev.[1] 0.7 0.4
Note: 1. Standard deviation number is based on measurement of at least 500 parts from three non-consecutive wafer lots during the initial characterization of this product, and is intended to be used as an estimate for distribution of the typical specification.
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INA-54063 Typical Performance
TC = 25C, Z O = 50 , Vd = 5 V, unless noted
25 8 16
6
P1 dB (dBm)
20 GAIN (dB) 5V
NOISE FIGURE (dB)
6V
7
4V 6V 5V
12
6V
5V 8
5
15
4V
4V 4 4
10 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 FREQUENCY (GHz)
3 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 FREQUENCY (GHz)
0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 FREQUENCY (GHz)
Figure 1. Gain vs. Frequency and Voltage.
Figure 2. Noise Figure vs. Frequency and Voltage.
Figure 3. Output Power for 1 dB Gain Compression vs. Frequency and Voltage.
14 12 10 P1 dB (dBm) 8 6 TA = +85C 4 TA = +25C TA = -40C 2 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 FREQUENCY (GHz)
22 20 18 GAIN (dB) 16 TA = +85C 14 TA = +25C TA = -40C 12 10 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 FREQUENCY (GHz) NOISE FIGURE (dB)
7.5 TA = +85C TA = +25C 6.5 TA = -40C 7 6 5.5 5 4.5 4 3.5 3 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 FREQUENCY (GHz)
Figure 4. Gain vs. Frequency and Temperature.
Figure 5. Noise Figure vs. Frequency and Temperature.
Figure 6. Output Power for P1dB Gain Compression vs. Frequency and Temperature.
3 2.5 VSWR out 2 Id (mA) VSWR in VSWR 1.5 1 0.5 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 FREQUENCY (GHz)
45 TA = +85C TA = +25C 35 TA = -40C 40 30 25 20 15 10 5 0 0 1 2 3 4 5 6 7 Vd (V)
Figure 7. Input and Output VSWR vs. Frequency.
Figure 8. Supply Current vs. Voltage and Temperature.
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INA-54063 Typical Scattering Parameters [1], TC = 25C, Z O = 50 , Vd = 5.0 V
Freq. GHz 0.10 0.20 0.30 0.40 0.50 0.60 0.70 0.80 0.90 1.00 1.10 1.20 1.30 1.40 1.50 1.60 1.70 1.80 1.90 2.00 2.10 2.20 2.30 2.40 2.50 2.60 2.70 2.80 2.90 3.00 3.10 3.20 3.30 3.40 3.50 3.60 3.70 3.80 3.90 4.00 4.10 4.20 4.30 4.40 4.50 4.60 4.70 4.80 4.90 5.00 Mag. 0.11 0.09 0.08 0.09 0.08 0.09 0.09 0.09 0.10 0.10 0.11 0.11 0.12 0.12 0.13 0.14 0.15 0.16 0.17 0.20 0.22 0.24 0.26 0.27 0.28 0.29 0.30 0.30 0.30 0.30 0.31 0.31 0.31 0.31 0.32 0.32 0.33 0.34 0.35 0.35 0.34 0.33 0.32 0.33 0.34 0.35 0.35 0.33 0.34 0.34 S11 Ang. 91 64 51 42 46 39 32 22 13 5 -3 -11 -20 -29 -36 -44 -53 -61 -68 -73 -80 -89 -99 -108 -112 -117 -124 -130 -133 -136 -138 -140 -142 -143 -145 -147 -148 -149 -152 -156 -159 -161 -161 -161 -162 -166 -170 -173 -174 -177 dB 16.9 17.6 17.7 17.9 18.1 18.2 18.3 18.5 18.7 18.9 19.1 19.4 19.6 19.9 20.2 20.4 20.7 21.0 21.1 21.2 21.2 21.0 20.7 20.1 19.5 18.6 17.8 16.9 16.1 15.3 14.6 13.8 13.2 12.5 11.9 11.2 10.6 9.9 9.1 8.4 7.8 7.1 5.6 4.5 4.8 4.9 4.8 4.6 4.2 3.9 S21 Mag. 7.02 7.56 7.71 7.81 8.00 8.11 8.24 8.41 8.58 8.80 9.05 9.28 9.58 9.88 10.19 10.51 10.86 11.16 11.36 11.44 11.43 11.25 10.86 10.16 9.39 8.55 7.79 7.03 6.35 5.83 5.35 4.92 4.57 4.23 3.93 3.65 3.38 3.11 2.84 2.62 2.46 2.27 1.91 1.68 1.73 1.75 1.74 1.69 1.62 1.57 Ang. 19 2 -7 -14 -21 -27 -33 -39 -45 -51 -57 -64 -70 -78 -85 -93 -101 -111 -120 -130 -141 -152 -164 -175 175 166 157 150 144 138 132 127 121 116 111 106 101 96 92 89 85 79 75 81 82 80 76 72 69 66 dB -27.7 -27.1 -27.0 -27.1 -27.3 -27.5 -27.8 -28.1 -28.4 -28.8 -29.2 -29.6 -30.1 -30.6 -31.1 -31.5 -32.0 -32.7 -33.5 -34.2 -34.9 -35.6 -36.0 -36.8 -37.8 -39.0 -39.3 -39.6 -41.6 -42.5 -43.7 -45.4 -45.4 -45.7 -44.8 -43.4 -42.2 -41.1 -40.3 -39.3 -38.0 -37.6 -37.6 -35.8 -33.4 -31.7 -30.4 -29.3 -28.2 -27.2 S12 Mag. 0.04 0.04 0.04 0.04 0.04 0.04 0.04 0.04 0.04 0.04 0.03 0.03 0.03 0.03 0.03 0.03 0.03 0.02 0.02 0.02 0.02 0.02 0.02 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.02 0.02 0.03 0.03 0.03 0.04 0.04 S22 Ang. 21 7 0 -5 -9 -12 -15 -17 -19 -21 -23 -25 -26 -27 -28 -29 -30 -31 -31 -29 -29 -28 -27 -26 -24 -23 -15 -16 -15 -5 3 13 31 47 65 75 82 88 93 99 103 104 112 127 129 128 126 124 123 122 Mag. 0.47 0.35 0.32 0.31 0.30 0.30 0.31 0.33 0.34 0.35 0.37 0.38 0.39 0.40 0.41 0.41 0.42 0.42 0.41 0.40 0.38 0.37 0.35 0.34 0.32 0.31 0.29 0.28 0.26 0.25 0.23 0.22 0.21 0.20 0.19 0.19 0.18 0.18 0.17 0.16 0.14 0.13 0.19 0.31 0.33 0.32 0.30 0.30 0.29 0.29 Ang. 75 34 10 -7 -23 -36 -47 -56 -65 -73 -80 -88 -94 -101 -108 -114 -120 -126 -132 -138 -144 -148 -151 -155 -158 -162 -164 -166 -170 -171 -173 -174 -174 -174 -174 -174 -174 -175 -175 -174 -171 -156 -135 -150 -170 180 173 167 164 160 K Factor 1.50 1.47 1.46 1.46 1.47 1.47 1.48 1.48 1.48 1.48 1.48 1.50 1.50 1.52 1.54 1.55 1.57 1.63 1.74 1.87 2.04 2.22 2.41 2.82 3.42 4.31 4.94 5.69 8.05 9.80 12.33 16.36 17.56 19.78 19.14 17.63 16.53 15.72 15.60 15.11 14.09 14.64 17.07 14.81 10.72 8.78 7.69 7.09 6.57 6.04
Note 1: Reference plane per Figure 14 in Applications Information section.
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INA-54063 Applications Information
Introduction
The INA-54063 is a silicon RFIC amplifier that is designed with an internal resistive feedback network to provide a 50 input and near 75 output impedance. With a 1-dB compressed Output Power of 8 dBm and Noise Figure of 5 dB, the INA-54063 is well suited for amplifier applications requiring high dynamic ranges. A unique feature of the INA-54063 is a positive gain slope over the 1-2 GHz range that is useful in many satellite-based TV and datacom systems. When used for the IF amplifier, the up-slope in the gain of the INA-54063 is intended to compensate for the negative gain slope in many Low Noise Block downconverters (LNB) used in consumer and commercial TV delivery systems, such as DDS, DBS, and TVRO. The positive gain slope can also compensate for the high frequency attenuation characteristics of 75 cables used to connect the outdoor LNBs to indoor set-top converters. In addition to use in TV delivery systems, the INA-54063 will find many applications in 50 input50 output gain and buffer stages in wireless communications systems.
typical current drain of 29 mA. All bias regulation circuitry is integrated into the RFIC. Figure 9 shows a typical implementation of the INA-54063. The supply voltage for the INA-54063 must be applied to two terminals, the Vcc pin and the RF Output pin.
C block RF OUTPUT
Example Layout for 50 Amplifier
An example layout for an amplifier using the INA-54063 with 50 input and 50 output is shown in Figure 10.
H
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INA-5XX63 DEMO BOARD
INPUT OUTPUT
54
RF INPUT C block C bypass
RFC
Vd
Figure 9. Basic Amplifier Application.
The Vd connection to the amplifier is RF bypassed by placing a capacitor to ground near the Vd pin of the amplifier package. The power supply connection to the RF Output pin is achieved by means of an RF choke (inductor). The value of the RF choke must be large relative to 50/75 in order to prevent loading of the RF Output. The supply voltage end of the RF choke is bypassed to ground with a capacitor. If the physical layout permits, this can be the same bypass capacitor that is used at the Vd terminal of the amplifier. Blocking capacitors are normally placed in series with the RF Input and the RF Output to isolate the DC voltages on these pins from circuits adjacent to the amplifier. The values for the blocking and bypass capacitors are selected to provide a reactance at the lowest frequency of operation that is small relative to 50 .
Vcc
Figure 10. RF Layout for 50 Input and Output.
This example uses a microstripline design (solid groundplane on the back side of the circuit board). The circuit board material is 0.031-inch thick FR-4. Plated through holes (vias) are used to bring the ground to the top side of the circuit where needed. Multiple vias are used to reduce the inductance of the path to ground. Figure 11 shows an assembled amplifier. The +5 volt supply (Vcc) is fed directly into the Vd pin of the INA-54063 and into the RF Output pin through the RF choke (RFC). Capacitor C3 provides RF bypassing for both the Vd pin and the power supply end of the RFC.
Operating Details
The INA-54063 is a voltage biased device that operates from a +5 volt power supply with a
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0
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RETURN LOSS (dB)
-2 -4 -6 -8 -10 -12 -14 -16 -18 Input Output
INA-5XX63 DEMO BOARD
INPUT C2 RFC C3 C4 C1
54
OUTPUT
-20 0.50 0.75 1.00 1.25 1.50 1.75 2.00 2.25 2.50 FREQUENCY (GHz)
Vcc
Figure 11. Assembled 50 Amplifier.
Figure 13. Measured Input and Output Return Loss for 50 Example Amplifier.
PCB Materials
Typical choices for PCB material for low cost wireless applications are FR-4 or G-10 with a thickness of 0.025 or 0.031 inches. A thickness of 0.062 inches is the maximum that is recommended for use with this particular device. The use of a thicker board material increases the inductance of the plated through vias used for RF grounding and may deteriorate circuit performance. Adequate grounding is needed not only to obtain maximum amplifier performance but also to reduce any possibility of instability.
Capacitor C4 is optional and may be used to add additional bypassing for the Vcc line. A well bypassed Vcc line is especially necessary in cascades of amplifier stages to prevent oscillation that may occur as a result of RF feedback through the power supply lines. For this demonstration circuit, the value chosen for the RF choke was 220 nH (Coilcraft 1008CS-221 or equivalent). All of the blocking and bypass capacitors are 1000 pF. These values provide excellent amplifier performance from under 50 MHz through 2.5 GHz. Larger values for the choke and capacitors can be used to extend the lower end of the bandwidth. Since the gain of the INA-54063 extends down to DC, the frequency response of the amplifier is limited only by the values of the capacitors and choke. A convenient method for making RF connection to the demonstration board is to use a PCB mounting type of SMA connector
(Johanson 142-0701-881, or equivalent). These connectors can be slipped over the edge of the PCB and the center conductors soldered to the input and output lines. The ground pins of the connectors are soldered to the ground plane on the backside of the board. The extra ground pins for the top of the board are not needed and are clipped off. The measured test results for the 50 input/output example amplifier using the INA-54063 are shown in Figures 12 and 13.
25
Phase Reference Planes
The positions of the reference planes used to measure S-Parameters for this device are shown in Figure 14. As seen in the illustration, the reference planes are located at the point where the package leads contact the test circuit.
REFERENCE PLANES
20
GAIN (dB)
15
10
5
0 0.50 0.75 1.00 1.25 1.50 1.75 2.00 2.25 2.50 FREQUENCY (GHz)
Figure 12. Measured Gain of 50 Example Amplifier.
TEST CIRCUIT
Figure 14. Phase Reference Planes.
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SOT-363 PCB Layout
The INA-54063 is packaged in the miniature SOT-363 (SC-70) surface mount package. A PCB pad layout for the SOT-363 package is shown in Figure 15 (dimensions are in inches). This layout provides ample allowance for package placement by automated assembly equipment without adding pad parasitics that could impair the high frequency performance of the INA-54063. The layout is shown with a nominal SOT-363 package footprint superimposed on the PCB pads for reference.
0.026
Parameters considered to be the most important to system performance are bounded by minimum or maximum values. For the INA-54063, these parameters are: Power Gain (|S21| 2), Noise Figure (NF), and Device Current (Id). Each of these guaranteed parameters is 100% tested. Values for most of the parameters in the table of Electrical Specifications that are described by typical data are the mathematical mean (), of the normal distribution taken from the characterization data. For parameters where measurements or mathematical averaging may not be practical, such as S-parameters or Noise Parameters and the performance curves, the data represents a nominal part taken from the "center" of the characterization distribution. Typical values are intended to be used as a basis for electrical design. To assist designers in optimizing not only the immediate circuit using the INA-54063, but to also optimize and evaluate trade-offs that affect a complete wireless system, the standard deviation () is provided for many of the Electrical Specifications parameters (at 25C) in addition to the mean. The standard deviation is a measure of the variability about the mean. It will be recalled that a normal distribution is completely described by the mean and standard deviation. Standard statistics tables or calculations provide the probability of a parameter falling between any two values, usually symmetrically located about the mean.
Referring to Figure 16 for example, the probability of a parameter being between 1 is 68.3%; between 2 is 95.4%; and between 3 is 99.7%.
68%
95% 99% -3 -2 -1 Mean +1 +2 (), typ Parameter Value +3
Figure 16. Normal Distribution.
0.075 0.035
0.016
Figure 15. PCB Pad Layout for INA-54063 (dimensions in inches).
Statistical Parameters Several categories of parameters appear within this data sheet. Parameters may be described with values that are either "minimum or maximum," "typical," or "standard deviations." The values for parameters are based on comprehensive product characterization data, in which automated measurements are made on of a minimum of 500 parts taken from 3 non-consecutive process lots of semiconductor wafers. The data derived from product characterization tends to be normally distributed, e.g., fits the standard "bell curve."
SMT Assembly Reliable assembly of surface mount components is a complex process that involves many material, process, and equipment factors, including: method of heating (e.g., IR or vapor phase reflow, wave soldering, etc.) circuit board material, conductor thickness and pattern, type of solder alloy, and the thermal conductivity and thermal mass of components. Components with a low mass, such as the SOT-363 package, will reach solder reflow temperatures faster than those with a greater mass. The INA-54063 is has been qualified to the time-temperature profile shown in Figure 17. This profile is representative of an IR reflow type of surface mount assembly process. After ramping up from room temperature, the circuit board with components attached to it (held in place with solder paste) passes through one or more preheat zones. The preheat zones increase the temperature of the
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board and components to prevent thermal shock and begin evaporating solvents from the solder paste. The reflow zone briefly elevates the temperature sufficiently to produce a reflow of the solder. The rates of change of temperature for the ramp-up and cooldown zones are chosen to be low enough to not cause deformation of the board or damage to components due to thermal
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shock. The maximum temperature in the reflow zone (TMAX) should not exceed 235C. These parameters are typical for a surface mount assembly process for the INA-54063. As a general guideline, the circuit board and components should be exposed only to the minimum temperatures and times necessary to achieve a uniform reflow of solder.
TMAX 200
TEMPERATURE (C)
Electrostatic Sensitivity RFICs are electrostatic discharge (ESD) sensitive devices. Although the INA-54063 is robust in design, permanent damage may occur to these devices if they are subjected to high energy electrostatic discharges. Electrostatic charges as high as several thousand volts (which readily accumulate on the human body and on test equipment) can discharge without detection and may result in degradation in performance, reliability, or failure. Electronic devices may be subjected to ESD damage in any of the following areas: * Storage and handling * Inspection and testing * Assembly * In-circuit use The INA-54063 is an ESD Class 1 device. Therefore, proper ESD precautions are recommended when handling, inspecting, testing, assembling, and using these devices to avoid damage.
150 Reflow Zone 100 Preheat Zone 50 0 0 60 120 180 240 300 TIME (seconds) Cool Down Zone
Figure 17. Surface Mount Assembly Profile.
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INA-54063 Part Number Ordering Information
Part Number INA-54063-TR1 INA-54063-BLK Devices per Container 3000 100 Container 7" reel tape strip in antistatic bag
Package Dimensions
Outline 63 (SOT-363/SC-70)
1.30 (0.051) REF.
2.20 (0.087) 2.00 (0.079)
1.35 (0.053) 1.15 (0.045)
0.650 BSC (0.025) 2.20 (0.087) 1.80 (0.071) 0.10 (0.004) 0.00 (0.00) 0.425 (0.017) TYP.
0.30 REF.
1.00 (0.039) 0.80 (0.031) 0.25 (0.010) 0.15 (0.006)
10
0.30 (0.012) 0.10 (0.004)
0.20 (0.008) 0.10 (0.004)
DIMENSIONS ARE IN MILLIMETERS (INCHES)
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Device Orientation
REEL
TOP VIEW 4 mm END VIEW
8 mm
CARRIER TAPE USER FEED DIRECTION COVER TAPE
54
54
54
54
Tape Dimensions and Product Orientation
For Outline 63
P P0 D P2
E
F W C
D1 t1 (CARRIER TAPE THICKNESS) Tt (COVER TAPE THICKNESS)
8 MAX.
K0
5 MAX.
A0
B0
DESCRIPTION CAVITY LENGTH WIDTH DEPTH PITCH BOTTOM HOLE DIAMETER DIAMETER PITCH POSITION WIDTH THICKNESS WIDTH TAPE THICKNESS CAVITY TO PERFORATION (WIDTH DIRECTION) CAVITY TO PERFORATION (LENGTH DIRECTION)
SYMBOL A0 B0 K0 P D1 D P0 E W t1 C Tt F P2
SIZE (mm) 2.24 0.10 2.34 0.10 1.22 0.10 4.00 0.10 1.00 + 0.25 1.55 0.05 4.00 0.10 1.75 0.10 8.00 0.30 0.255 0.013 5.4 0.10 0.062 0.001 3.50 0.05 2.00 0.05
SIZE (INCHES) 0.088 0.004 0.092 0.004 0.048 0.004 0.157 0.004 0.039 + 0.010 0.061 0.002 0.157 0.004 0.069 0.004 0.315 0.012 0.010 0.0005 0.205 0.004 0.0025 0.00004 0.138 0.002 0.079 0.002
PERFORATION
CARRIER TAPE COVER TAPE DISTANCE
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